Ultra-low inductance design for a GaN HEMT based 3L-ANPC inverter

In this paper, an ultra-low inductance power cell design for a 3L-ANPC based on 650 V GaN HEMT devices is presented. The 3L-ANPC topology with GaN HEMT devices and the selected modulation scheme suitable for wide-bandgap (WBG) devices are presented. The commutation loops, which are the main contributors to voltage overshoots and increase of switching losses, are discussed. The ultra-low inductance power cell design based on a four layer PCB with the aim to maximise the switching performance of GaN HEMTs is explained. Gate driver design for GaN HEMT devices is presented. Common-mode behaviours based on SPICE model of the converter is analysed. Experimental results on the designed 3L-ANPC with the output power of up to 1 kW are presented, which verifies the performance of the proposed design in terms of ultra-low inductance.