Programmable analog VLSI CNN chip with local digital logic

K. Halonen; V. Porra; T. Roska; Leon O Chua

doi:10.1109/iscas.1991.176606

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Leon O Chua

University of California, Berkeley

Programmable analog VLSI CNN chip with local digital logic

Article 1991 en

Authors

KH
K. Halonen
VP
V. Porra
TR
T. Roska

Abstract

1 min read

A new integrated circuit cellular neural network (CNN) implementation having digitally or continuously selectable template coefficients is presented. Local logic and memory are added into each cell providing a simple dual (analog and digital) computing structure. The variable-gain operational transconductance amplifiers (OTAs) are used as the voltage controlled current sources to program the template element values. This analog array processor can be applied to solve problems with a sequence of different templates. A 4-by-4 CNN circuit is realized using the 2- mu m analog CMOS process. To test the circuit a general purpose control system was designed with the microcomputer interface.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>

Programmable analog VLSI CNN chip with local digital logic

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