In: Image Processing with Stencil Pipelines (Synthesis lectures on computer architecture)
Chapter In A Book 2018 English
Authors
SB
Steven Bell
PJ
Pu Jing
JH
James Hegarty
Abstract
1 min read
In this chapter, we'll examine image processing in more depth, showing why it is particularly amenable to hardware acceleration, and describing the architectural patterns that we will leverage in the remainder of the book.
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