Analysis of phase-locked loop influence on the stability of single-phase grid-connected inverter

A controlled power inverter can cause instability at the point of common coupling (PCC) with its output filter and the grid. This paper analyzes the influence of the Phase-Locked Loop (PLL) on the output admittance of single-phase current-controlled inverters with different grid stiffness. It shows that the PLL introduces a paralleled admittance into the output admittance of the inverter, which may lead to unintentional low-order harmonic oscillation in a weak grid. Moreover, the Second Order Generalized Integrator PLL (SOGI-PLL) is also modeled. It is found that the quadrature signal generator of SOGI plays a stabilizing role in grid-inverter interactions, which thus provides a promising candidate for avoiding the PLL-induced instability in single-phase inverters. Simulation results are presented for verifying the theoretical analysis. The possible instability due to different PLL bandwidth is also demonstrated.