A Carrier Synchronization Method for Global Synchronous Pulsewidth Modulation Application Using Phase-Locked Loop

When many distributed parallel inverters are integrated into grid without switching sequence coordinated control capability, the high frequency harmonics will accumulate randomly at the Point of Common Coupling (PCC). Global synchronous pulse width modulation (GSPWM) method can significantly attenuate the accumulated switching ripples by intentionally assuming an intelligent optimization algorithm and a communication system. To avoid the dependence on low-latency communication system, this paper proposes a novel phase locked loop based PWM carrier synchronization (PLL-CS) method for GSPWM system, where the switching sequences can be effectively synchronized as expected without using low-latency synchronization signals. By doing so, the operational reliability of the whole GSPWM system can be significantly improved while the additional hardware cost of GSPWM can be dramatically reduced, which can enhance the implementation adaptability of GSPWM method. Experimental results have verified the performance of the proposed PLL-CS GSPWM method.