13 publications from this institution
Today, reversible logic circuits has attracted considerable attention in improving some fields like nanotechnology, quantum computing, and low power design. In this paper 4 bit reversible comparator based on classical logic circuit is represented which uses existing reversible gates. In this design we try to reduce optimization parameters like number of constant inputs, garbage outputs, and quantum cost. The results show that, the proposed comparator has 4 quantum cost and one constant input less than the prior design. 1
This study focuses on optimizing hybrid energy storage systems for improved energy management in power networks. Combining batteries and supercapacitors, these systems offer a promising solution for addressing various network challenges, such as power quality enhancement and voltage stabilization. However, effective control remains a critical aspect. Conventional control methods are reviewed, highlighting their limitations. To overcome these challenges, a novel approach integrating fuzzy logic and rule-based systems is proposed. This hybrid method enables adaptable operation in both network-connected and independent modes, catering to diverse network conditions and operational requirements. The proposed control strategy aims to maintain DC bus voltage within acceptable limits, regulate battery and supercapacitor charge levels, and maximize supercapacitor utilization to prolong battery lifespan. Simulation studies conducted in Matlab/Simulink validate the efficacy of the proposed approach. Results demonstrate rapid voltage recovery with minimal overshoot and undershoot, ensuring stable network operation. Additionally, the proposed method significantly increases supercapacitor utilization compared to traditional methods, indicating enhanced system performance and energy storage capacity.
In this paper, a new phase error analysis is introduced for rotary traveling wave oscillators (RTWOs). Two new analytical approaches are used to extract closed-form equations for the RTWOs phase error arising from asymmetric resonator and inequality of negative transconductors. Derived equations show that the phase error can be cancelled and even controlled by adjusting the bias current of negative transconductors without any undesirable changing in oscillation frequency. This characteristic is then used for introducing a new phase error calibration method for RTWOs. This calibration method is not limited by the problems that limit the usage of the prior calibration technique. Our theoretical results are compared with accurate simulations to evaluate the validity of the proposed analysis and accuracy of the closed-form equations. Simulations have been done in 0.18-μm CMOS technology with a 1.8-V supply voltage. The evaluations show good agreement between analytical phase-error equations and simulation results. Also, appropriate simulations confirm the validity of the calibration method that is introduced in this paper.
Summary This paper analyzes the thermally induced phase noise and the up‐conversion of flicker noise into phase noise of source injection coupled quadrature oscillator (SIC‐QOSC), for the first time. Furthermore, this paper provides a complete analysis for the injection current of the SIC‐QOSC and extracts the closed‐form expressions for it for the first time, too. These expressions lead to obtaining the harmonics of the injection current as well as the oscillation amplitude, which is necessary for the phase noise analysis. To evaluate the extracted equations, this paper compares the calculated results with appropriate simulations. Comparisons confirm the accuracy of the proposed injection current expressions and the phase noise formulas. Using the closed‐form equations of phase noise, designers can understand the SIC‐QOSC's design tradeoffs and design the oscillator for given phase noise.
A low voltage low power operational transconductance amplifier (OTA) based on a bulk driven cell and its application to implement a tunable Gm-C filter is presented. The linearity of the OTA is improved by attenuation and source degeneration techniques. The attenuation technique is implemented by bulk driven cell which is used for low supply voltage circuits. The OTA is designed to operate with a 0.9 V supply voltage and consumes 58.8 μW power. A 600 mVppd sine wave input signal at 1 MHz frequency shows total harmonic distortion (THD) better than -40 dB over the tuning range of the transconductance. The OTA has been used to realize a tunable Gm-C low-pass filter with gain tuning from 5 dB to 21 dB with 4 dB gain steps, which results in power consumptions of 411.6 to 646.8 μW. This low voltage filter can operate as channel select filter and variable gain amplifier (VGA) for wireless sensor network (WSN) applications. The proposed OTA and filter have been simulated in 0.18 μm CMOS technology. Corner case and temperature simulation results are also included to forecast process and temperature variation affects after fabrication.
Summary A new rotary traveling wave oscillator (RTWO) with automatic phase error compensation feedback is proposed in this paper. By introducing a new negative transconductor (− G m cell) circuit, the currents in four − G m cells adjust differently to cancel the phase errors. To better understand the new RTWO phase error compensation technique and design procedure of the whole system, the system analysis for describing the phase error compensation technique is provided. The design considerations of each block of the new RTWO at the circuit level are clarified. Besides, the stability of the whole system is analyzed. Appropriate simulations have been done in 0.18 μm CMOS technology with a 1.8 V supply voltage to evaluate the new RTWO performance and its accuracy. The evaluations verify the capability of the new RTWO to cancel the phase error.
This paper proposes 1 bit full adder using double-gate FinFet transistor and Gate Diffusion Input (GDI) technique. Using GDI cell makes it possible to reduce the number of transistors and merging this technique with double gate process causes further reduction in power and delay. Although, double gate transistors with independent gates are the choice for low power design, we use both dependent and independent gates in proposed circuit to achieve lower power. This issue is related to GDI cell properties which is discussed in more details in this paper. Simulations are performed on 45nm providing a sub-circuit model for FinFET from PTM and 1V supply voltage. According to our simulation result, the proposed full adder is better than prior designs in terms of power and power*delay.
Summary This paper analyzes the thermally induced phase noise and the up‐conversion of flicker noise into phase noise of rotary traveling‐wave oscillator (RTWO). Based on the analyses, this paper extracts the closed‐form formulas for the thermal and flicker phase noise of the RTWO. This paper compares the theoretical results with appropriate simulations to evaluate the accuracy of the derived closed‐form formulas. Comparisons confirm the accuracy of the extracted phase noise formulas. By using the presented straightforward approach along with accurate phase noise formulas, the designers can understand the RTWO ' s design tradeoffs. Also, they can design the RTWO for a specific phase noise without needing lengthy simulations.
A low voltage bulk-driven operational transconductance amplifier (OTA) and its application to implement a tunable Gm-C filter are presented. The linearity of the proposed OTA is achieved by nonlinear terms cancelation technique, using two paralleled differential topologies with opposite signs in the third-order harmonic distortion term of the differential output current. The proposed OTA uses 0.8 V supply voltage and consumes 31.2 μW. The proposed OTA shows a total harmonic distortion of better than −40 dB over the tuning range of the transconductance, by applying 800 mVppd sine wave input signal with 1 MHz frequency. The OTA has been used to implement a third-order low-pass Gm-C filter, which can be used for wireless sensor network applications. The filter can operate as the channel select filter and variable gain amplifier, simultaneously. The gain of the filter can be tuned from −1 to 23 dB, which results in power consumptions of 187.2 to 450.6 μW, respectively. The proposed OTA and filter have been simulated in a 0.18 µm CMOS technology. Simulations of process corners and temperature variations are also included in the paper. Copyright © 2014 John Wiley & Sons, Ltd.
In this paper, a dual-mode standing-rotary traveling-wave oscillator (S-RTWO) is analyzed. In order to force the conventional RTWO to oscillate in the standing wave mode, an ideal switch is used for shorting two differential nodes of the RTWO circuit. The closed-form equations, which describe the transitions of phases between the standing wave mode and the rotary traveling wave mode of the oscillator, are derived, and the delays of transitions between two modes of the oscillator are extracted by using these equations. Besides, the oscillation start-up delay is analyzed, and the closed-form equation for the start-up delay is obtained in terms of circuit elements. Finally, our theoretical results are compared with appropriate and accurate simulations to evaluate the validity of the delays analysis and the accuracy of the closed-form equations. Simulations of the dual-mode oscillator have been done in a 0.18-μm CMOS technology with a 1.8-V supply voltage. The evaluations show very good agreement between analytical equations and simulation results, and confirm the validity and accuracy of the delays analysis.
