The electrical design of high-speed and high-density ASIC package

This paper introduces a package of a high-speed and high-density switching ASIC with over 1000 pins and hundreds of high-speed transmission lines crowded in two layers of the substrate, and also demonstrates Signal Integrity (SI) and Power Integrity (PI) implementation. In order to route the transmission lines with minimum distortion, crosstalk and attenuation, routing is co-designed with die and BGA maps. To guarantee that over a hundred transmission lines will be matched identically, each transmission line is designed to have a corresponding continuous return path routed among integrated copper shapes. Various routing schemes designed to take advantage of the physical and electrical performance of materials and structures are also implemented to optimize the performance of the transmission line. Various simulations are carried out on test segments to evaluate performance and signal integrity in the frequency and time domains.