Shallow trench isolation for ultra-large-scale integrated devices
Article 1994 en
Authors
KB
Kenneth A. Blumenstock
JT
Johannes Theisen
PP
Paihung Pan
Abstract
1 min read
A new process to form shallow trench isolation for ultra-large-scale integrated devices is presented. This technique utilizes chemical mechanical polish steps to provide a virtual planar surface at the end of processing for isolations of various size, ranging from 0.5 μm to several hundred μm. Superior uniformity has been obtained on wafers of 8 in. diam processed in a productionlike environment. Good device isolation also has been found.
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