Scalable Interconnection and Integration of Nanowire Devices without Registration
Nano Letters 4(5): 915-919
Article 2004 English
Authors
SJ
Song Jin
DW
Dongmok Whang
MM
Michael C. McAlpine
Abstract
1 min read
A general strategy for the parallel and scalable integration of nanowire devices over large areas without the need to register individual nanowire−electrode interconnects has been developed. The approach was implemented using a Langmuir−Blodgett method to organize nanowires with controlled alignment and spacing over large areas and photolithography to define interconnects. Centimeter-scale arrays containing thousands of single silicon nanowire field-effect transistors were fabricated in this way and were shown to exhibit both high performance with unprecedented reproducibility and scalability to at least the 100-nm level. Moreover, scalable device characteristics were demonstrated by interconnecting a controlled number of nanowires per transistor in "pixel-like" device arrays. The general applicability of this approach to other nanowire and nanotube building blocks could enable the assembly, interconnection, and integration of a broad range of functional nanosystems.
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