Scalable circuits for supply noise measurement

This paper discusses techniques to allow high-resolution supply noise measurements in advanced CMOS technologies without the overhead of voltage references or separate power supplies. In addition to improving the existing sample and hold-based system, we propose a new technique that uses a very short integration time in the voltage-controlled oscillator (VCO)-based A/D converter and hence removes the difficult-to-scale sample and hold circuit. Each conversion results in a low-resolution measurement; however the measurements are intrinsically dithered so that resolution can be increased by averaging multiple conversions. Both sample and hold-based and averaging-based systems are implemented in a 90nm SOI process as part of a characterization test chip for the parallel interface described in (Chang et al., 2005). Measurement results show both systems are capable of measuring supply noise down to 5mV with bandwidths well in the GHz range.