Performance evaluation of buck-boost three-level inverters with topological and modulation development

This paper proposes a series of buck-boost three-level inverters for neutral-point-clamped (NPC) and dc-link-cascaded (DCLC) topologies using the SEPIC-derived front-end circuits with the bidirectional operation capability which can be modulated using either phase disposition (PD) or alternative phase opposition disposition (APOD) modulation scheme. To achieve the optimized harmonic performance corresponding to the PD modulation, the buck-boost three-level inverter is designed with two special voltage boost circuitries. For further minimizing the component count, only one voltage boost circuitry is assumed to regulate the dc-link voltage with the designed APOD modulation adopted. By separately controlling the switching signals of upper full-bridge in the dc-link cascaded inverter, the voltage boost circuitry can be simplified with single dc switch, which significantly reduces whole system cost and switching losses. All theoretical findings have been verified experimentally using laboratory prototypes.