Optimization of the electron hole bilayer tunneling field effect transistor

In order to reduce the power consumption of modern electronics, the operating voltage needs to be significantly reduced. The electron hole bilayer tunneling field effect transistor (bilayer TFET) has the potential for reduced voltage operation. [1, 2] The device structure is shown in Fig. 1. Recent simulations of the bilayer TFET show poor on-state current [1] and electrostatic gate efficiency [2]. In this work we propose a new biasing scheme to improve gate efficiency by exploiting quantum capacitance and create a new model to analyze the tradeoff between gate efficiency and on-state current to find the optimal device design.