Low-Power Manhattan Distance Calculation Circuit for Self-Organizing Neural Networks Implemented in the CMOS Technology

The paper presents an analog, current-mode circuit that cal- culates a distance between the neuron weights vectors W and the input learning patterns X. The circuit can be used as a component of dierent self-organizing neural networks (NN) implemented in the CMOS technol- ogy. In Self-Organizing Maps (SOM) as well as in NNs using the Neural Gas or the Winner Takes All (WTA) learning algorithms, to calculate the distance between X and W , the same circuit can be used that makes it a universal structure. Detailed system level simulations of the WTA NN and the Kohonen SOM showed that using both the Euclidean (L2) and the Manhattan (L1) distance measures leads to similar learning results. For this reason, the L1 measure has been implemented, as in this case the circuit is much simpler than the one using the L2 distance, resulting in very low chip area and low power dissipation. This enables including even large NNs in miniaturized portable devices, such as sensors in Wireless Sensor Networks (WSN) or Wireless Body Area Networks (WBAN).