Investigation of substrate damage and other issues in hydrogen plasma implantation for silicon-on-insulator (SOI) fabrication

High-speed, low-voltage CMOS chips are better built in silicon-on-insulator (SOI). The semiconductor industry demands a high quality, high throughput, low cost and low footprint technique to produce SOI wafers, and hydrogen plasma immersion ion implantation (PIII) combined with ion-cut and wafer bonding is a viable commercial approach. While the feasibility of this process has been demonstrated, there are still a number of unanswered questions. In this paper, issues concerning the required implantation dose, surface hydrogen, and substrate damage caused by hydrogen and other residual gaseous impurities as well as surface roughness are discussed. Dynamic secondary ion mass spectrometry (D-SIMS) is utilized to measure the implantation close and surface hydrogen while channeling Rutherford backscattering spectrometry (C-RBS) and contact mode atomic force microscopy (AFM) are employed to detect the substrate damage and surface roughness, respectively. The desirable hydrogen dose for layer transfer lies in the range between high 10/sup 16/ cm/sup -2/ and low 10/sup 17/ cm/sup -2/ whereas D-SIMS results show that surface hydrogen (<50 nm deep) accounts for more than 35% of the implanted hydrogen dose at an implantation voltage of -25 kV. A lower dose implant yields better layer quality and less damage as revealed by RBS. A target temperature higher than 300/spl deg/C during implantation may lead to escape of hydrogen from the substrate and AFM reveals a high degree of surface roughness.