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Implementation of a Soft Switching Converter with High Input Voltage — Bor Ren Lin (2012) | RDL Network
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Implementation of a Soft Switching Converter with High Input Voltage
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Bor Ren Lin
Implementation of a Soft Switching Converter with High Input Voltage
Article
2012
en
Authors
Bor Ren Lin
CL
Chien‐Hung Liu
Abstract
1 min read
This paper presents an interleaved zero voltage switching (ZVS) DC/DC converter with high input voltage applications. In order to reduce the voltage stress of MOSFETs, two half-bridge zeta converters are connected in series at high voltage side. Thus, the voltage stress of MOSFETs can be clamped at one-half of input voltage. Asymmetric pulse-width modulation (APWM) is adopted to control power switches. With the resonant behavior by the leakage inductance of transformer and the output capacitance of MOSFET at the transition interval, MOSFETs can be turned on at ZVS. For each half-bridge zeta converter, two series transformers are connected in series at the primary side and in parallel at the secondary side in order to reduce the current stress of secondary windings for high load current applications. Interleaved PWM scheme is used to control two half-bridge converters in order to reduce the size of output filter inductor and capacitor due to the partial ripple current cancellation. Experimental results, taken from a laboratory prototype rated at 1 kW, are presented to demonstrate the converter performance. Copyright © 2012 John Wiley & Sons, Ltd.
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