High-frequency characterization of on-chip digital interconnects

On-chip inductance is becoming increasingly important as technology continues to scale. This paper describes a way to characterize inductive effects in interconnects. It uses realistic test structures that study the effect of mutual couplings to local interconnects, to random lines connected to on-chip drivers, and to typical power and ground grids. The use of S parameters to characterize the inductance allows a large number of lines to be extracted while requiring only a small overhead measurement of dummy open pads to remove measurement parasitics. It also enables direct extraction of the frequency-dependent R, L, G, C parameters. The results are summarized with curve-fitted formulas of inductance and resistance over a wide range of line spacings and line widths. The significance of the frequency dependence is illustrated with transient analysis of a typical repeater circuit in a 0.25-/spl mu/m technology. A model that captures the frequency dependency of the extracted parameters accurately predicts the performance of a new inductance-sensitive ring oscillator.