Hardware implementation of the particle swarm optimization algorithm

In this paper, we present a concept of a transistor level implementation of the Particle Swarm Optimization (PSO) algorithm that belongs to the group of unsupervised learning algorithms aimed at the design of artificial neural networks (ANNs). The algorithm exhibits an ability to search for an optimal solution in a multidimensional data space, in which many sub-optimal solutions may exist. The ANN that operates in accordance with the PSO algorithm is composed of a set of cooperating particles (agents) that explore an input data space and communicate information on the best found solution to other particles. The PSO algorithm is usually implemented in software. We in our investigations focus on its transistor level realization. Such an approach enables parallel data processing, in which the overall data rate only moderately depends on the number of particles. Most of the operations and components of such implemented PSO algorithm may be reused considering our former CMOS realizations of other self-organizing learning algorithms. This allowed us to assess main parameters of the PSO.