Fabrication of Sub-10-nm Silicon Nanowire Arrays by Size Reduction Lithography

A photolithography-based method capable of size reduction to produce sub-10-nm Si nanowire arrays on a wafer scale is described. By conformally depositing a material (silicon oxide or silicon) that has a different etching property over a lithographically defined sacrificial sidewall and selectively removing the sacrificial material, the sidewall material is preserved and can serve as nanopattern mask for further processing. The resolution of this method is not limited by photolithography but by the thickness of the material deposited. The application of size reduction nano-patterning method can range from the fabrication of biosensors to model catalyst systems.