Equalization and clock recovery for a 2.5-10Gb/s 2-PAM/4-PAM backplane transceiver cell

Jared Zerbe; C. Werner; Vladimir Stojanović; F. Chen; J. Wei; G. Tsang; Donggeon Kim; William Stonecypher; A. Ho; T.P. Thrush; Ravi Kollipara; Gong Jong Yeh; Mark Horowitz; Kevin Donnelly

doi:10.1109/isscc.2003.1234216

Abstract

1 min read

A backplane transceiver uses a folded 5-tap TX equalizer and 5-tap RX equalizer to counteract losses and reflections. A flexible 2-PAM/4-PAM CDR uses select transitions for receive clock recovery. BER better than 10/sup -15/ at 10 Gb/s and power <60 mW/Gb are measured values for a 16" backplane with two high speed connectors.

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