Asynchronous early output majority voter and a relative-timed asynchronous TMR implementation

This article presents a new asynchronous early output 3-input majority voter that is used to realize a high-speed, low power and less area occupying relative-timed asynchronous TMR implementation. The proposed majority voter is used to realize an asynchronous TMR implementation and it is compared with asynchronous TMR implementations realized using other asynchronous majority voters. The dual-rail code was used for data encoding and two kinds of four-phase handshaking were used for data communication. Compared to the existing implementations, we find that the proposed asynchronous majority voter leads to an efficient TMR implementation by simultaneously reducing the cycle time, silicon area, and average power dissipation by 25.1%, 7.5% and 7.8% respectively, on average. The implementations used a 32/28 nm CMOS process technology.