A Space-Charge-Limited van der Waals Spin Transistor
Preprint 2025
Authors
TG
Thomas K. M. Graham
YW
Yu‐Xuan Wang
NN
Niketh Nair
Abstract
1 min read
Integrating semiconducting and magnetic materials could combine transistor-like operation with nonvolatility and enable architectures such as logic-in-memory. Here, we employ correlated electrical transport and scanning nitrogen-vacancy (NV) center magnetic imaging to elucidate a spin transistor concept that amalgamates both vertical and lateral transport in a 2D antiferromagnetic semiconductor, distinct from purely vertical tunneling devices. Our device, based on a monolayer-bilayer junction in CrSBr, displays giant, gate-tunable magnetoresistance driven by the dual action of electrostatic doping on space-charge-limited lateral conduction and interlayer exchange coupling. Moreover, we visualize a field-trainable, layer-sharing effect that selects between coherent or domain-wall reversal at the spin-flip transition, enabling multilevel, memristive conductance states. These findings open opportunities for 2D magnetic semiconductors to address limitations in contemporary computing.
Andreas Beer, Klaus Zollner, Caique Serati de Brito, Paulo E. Faria, Talieh S. Ghiasi, Josep Ingla‐Aynés, Samuel Mañas‐Valero, Carla Boix‐Constant, Kenji Watanabe, Takashi Taniguchi, Jaroslav Fabian, Herre S. J. van der Zant, Y. Galvão Gobato, Christian Schüller
Andreas Beer, Klaus Zollner, Caique Serati de Brito, Paulo E. Faria, Philipp Parzefall, Talieh S. Ghiasi, Josep Ingla‐Aynés, Samuel Mañas‐Valero, Carla Boix‐Constant, Kenji Watanabe, Takashi Taniguchi, Jaroslav Fabian, Herre S. J. van der Zant, Y. Galvão Gobato, Christian Schüller
Discussion(0)
No comments yet. Be the first to comment.