20Gb/s 0.13μm CMOS serial link transmitter using an LC-PLL to directly drive the output multiplexer
Article 2004 English
Authors
PC
Patrick Yin Chiang
WD
William J. Dally
ML
M.-J.E. Lee
Abstract
1 min read
A 20Gb/s transmitter is implemented in 0.13/spl mu/m CMOS technology. Eight 2.5Gb/s data streams are 4:1 multiplexed, sampled, and retimed into two 10Gb/s data streams. A final 20Gb/s 2:1 output multiplexer, clocked by complementary phases of an LC-VCO (voltage controlled oscillator) in a phase-locked loop, creates 20Gb/s data. The VCO is integrated with the output multiplexer, resonating the load and eliminating the need for clock buffers. Power, active die area, and jitter (RMS/pk-pk) are 165mW, 650/spl mu/m /spl times/ 350/spl mu/m, and 2.37ps/15ps, respectively.
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